vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 1 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 inverter grade thyristors (hockey puk version), 390 a features ? metal case with ceramic insulator ? all diffused design ? center amplifying gate ? guaranteed high dv/dt ? international standard case a-puk (to-200ab) ? guaranteed high di/dt ? high surge current capability ? low thermal impedance ? high speed performance ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 typical applications ?inverters ? choppers ? induction heating ? all types of force-commutated converters ? ? electrical specifications primary characteristics package a-puk (to-200ab) circuit configuration single scr i t(av) 390 a v drm /v rrm 400 v, 800 v v tm 1.58 v i tsm at 50 hz 5260 a i tsm at 60 hz 5510 a i gt 200 ma t c /t hs 55 c a-puk (to-200ab) major ratings and characteristics parameter test conditions values units i t(av) 390 a t hs 55 c i t(rms) 745 a t hs 25 c i tsm 50 hz 5850 a 60 hz 6130 i 2 t 50 hz 171 ka 2 s 60 hz 156 v drm /v rrm 400 to 800 v t q range 10 to 30 s t j -40 to +125 c voltage ratings type number voltage code v drm /v rrm , maximum repetitive peak voltage v v rsm , maximum non-repetitive peak voltage v i drm /i rrm maximum at t j = t j maximum ma vs-st223c..c 04 400 500 40 08 800 900
vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 2 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 current carrying capability frequency units 50 hz 930 800 1430 1220 5870 5240 a 400 hz 910 770 1490 1300 3120 2740 1000 hz 780 650 1430 1260 1880 1640 2500 hz 490 400 1070 920 1000 860 recovery voltage v r 50 50 50 v voltage before turn-on v d v drm v drm v drm rise of on-state current di/dt 50 - - a/s heatsink temperature 405540554055c equivalent values for rc circuit 47/0.22 47/0.22 47/0.22 ?? f on-state conduction parameter symbol test conditions values units maximum average on-state current ? at heatsink temperature i t(av) 180 conduction, half sine wave ? double side (sin gle side) cooled 390 (150) a 55 (85) c maximum rms on-state current i t(rms) dc at 25 c heatsink temp erature double side cooled 745 a maximum peak, one half cycle, ? non-repetitive surge current i tsm t = 10 ms no voltage ? reapplied sinusoidal ha lf wave, ? initial t j = t j maximum 5850 t = 8.3 ms 6130 t = 10 ms 100 % v rrm ? reapplied 4920 t = 8.3 ms 5150 maximum i 2 t for fusing i 2 t t = 10 ms no voltage ? reapplied 171 ka 2 s t = 8.3 ms 156 t = 10 ms 100 % v rrm ? reapplied 121 t = 8.3 ms 110 maximum i 2 ? t for fusing i 2 ? t t = 0.1 to 10 ms, no voltage reapplied 1710 ka 2 ? s maximum peak on -state voltage v tm i tm = 600 a, t j = t j maximum, t p = 10 ms sine wave pulse 1.58 v low level value of threshold voltage v t(to)1 (16.7 % x ? x i t(av) < i < ? x i t(av) ), t j = t j maximum 1.05 high level value of threshold voltage v t(to)2 (i > ? x i t(av) ), t j = t j maximum 1.09 low level value of forward slope resistance r t1 (16.7 % x ? x i t(av) < i < ? x i t(av) ), t j = t j maximum 0.88 m ? high level value of forward slope resistance r t2 (i > ? x i t(av) ), t j = t j maximum 0.82 maximum holding current i h t j = 25 c, i t > 30 a 600 ma typical latchi ng current i l t j = 25 c, v a = 12 v, r a = 6 ? , i g = 1 a 1000 switching parameter symbol test conditions values units min. max. maximum non-repe titive rate ? of rise of turned on current di/dt t j = t j maximum, v drm = rated v drm , i tm = 2 x di/dt 1000 a/s typical delay time t d t j = 25 c, v dm = rated v drm , i tm = 50 a dc, t p = 1 s ? resistive load, gate pulse: 10 v, 5 ? source 0.78 s maximum turn-off time t q t j = t j maximum, ? i tm = 300 a, commutating di/dt = 20 a/s ? v r = 50 v, t p = 500 s, dv/dt: see table in device code 10 30 180 el i tm 180 el i tm 100 s i tm
vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 3 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 note ? the table above shows the increment of thermal resistance r thj-hs when devices operate at different conduction angles than dc blocking parameter symbol test conditions values units maximum critical rate of rise of off-state voltage dv/dt t j = t j maximum, linear to 80 % v drm , ? higher value available on request 500 v/s maximum peak reverse and off-state leakage current i rrm , i drm t j = t j maximum, rated v drm /v rrm applied 40 ma triggering parameter symbol test conditions values units maximum peak gate power p gm t j = t j maximum, f = 50 hz, d% = 50 60 w maximum average gate power p g(av) 10 maximum peak positi ve gate current i gm t j = t j maximum, t p ? 5 ms 10 a maximum peak positi ve gate voltage +v gm 20 v maximum peak negati ve gate voltage -v gm 5 maximum dc gate curren t required to trigger i gt t j = 25 c, v a = 12 v, r a = 6 ? 200 ma maximum dc gate voltag e required to trigger v gt 3v maximum dc gate curr ent not to trigger i gd t j = t j maximum, rated v drm applied 20 ma maximum dc gate volt age not to trigger v gd 0.25 v thermal and mechanical specifications parameter symbol test conditions values units maximum operating temperature range t j -40 to +125 c maximum storage temperature range t stg -40 to +150 maximum thermal resistance , junction to heatsink r thj-hs dc operation single side cooled 0.17 k/w dc operation double side cooled 0.08 maximum thermal resistance, case to heatsink r thc-hs dc operation single side cooled 0.033 dc operation double side cooled 0.017 mounting force, 10 % 4900 (500) n (kg) approximate weight 50 g case style see dimensions - link at the end of datasheet a-puk (to-200ab) ? r thj-hs conduction conduction angle sinusoidal conduction rectangular conduction test conditions units single side double side single side double side 180 0.015 0.017 0.011 0.011 t j = t j maximum k/w 120 0.019 0.019 0.019 0.019 90 0.024 0.024 0.026 0.026 60 0.035 0.035 0.036 0.037 30 0.060 0.060 0.060 0.061
vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 4 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 1 - current rati ngs characteristics fig. 2 - current rati ngs characteristics fig. 3 - current rati ngs characteristics fig. 4 - current rati ngs characteristics fig. 5 - on-state powe r loss characteristics fig. 6 - on-state powe r loss characteristics 30 40 50 60 70 80 90 100 110 120 130 0 50 100 150 200 250 300 30 60 90 120 180 average o n-state c urren t (a) conduction angle maximum allowable heatsink temperature (c) st223c ..c series (single side co oled) r (d c) = 0.1 7 k/w thj- hs 20 30 40 50 60 70 80 90 100 110 120 130 0 50 100 150 200 250 300 350 400 450 dc 30 60 90 120 180 a verage o n-state c urren t (a) conduction period m axim um allowable heatsink temperature (c) st223 c..c s eries (single side c oo led) r (d c) = 0 .17 k/w thj-hs 20 30 40 50 60 70 80 90 100 110 120 130 0 100 200 300 400 500 30 60 90 120 180 average o n-state c urren t (a) conduction angle m aximum allow able heatsink tem perature (c) st223c ..c series (d ouble side c o oled) r ( d c ) = 0 .0 8 k / w th j-h s 20 30 40 50 60 70 80 90 100 110 120 130 0 100 200 300 400 500 600 700 800 dc 30 60 90 120 180 a ve ra g e o n -sta te curre nt (a ) conduction period maxim um allowable heatsink tem perature (c) st 223c ..c se rie s (d o uble side c oole d) r (d c ) = 0.08 k/w thj- h s 0 200 400 600 800 1000 0 100 200 300 400 500 180 120 90 60 30 rm s limit conduction angle maximum average on-state power loss (w) average on-state current (a) st223c..c series t = 125c j 0 200 400 600 800 1000 1200 1400 0 100 200 300 400 500 600 700 800 dc 180 120 90 60 30 rms limit conduction period maximum average on-state power loss (w) average on-state current (a) st22 3c ..c series t = 125c j
vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 5 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 7 - maximum non-re petitive surge current single and double side cooled fig. 8 - maximum non-re petitive surge current single and double side cooled fig. 9 - on-state voltag e drop characteristics fig. 10 - thermal impedance z thj-hs characteristics fig. 11 - reverse recovered charge characteristics fig. 12 - reverse recovered current characteristics 2500 3000 3500 4000 4500 5000 5500 0 0 1 0 1 1 number of equal amplitude half cycle current pulses (n) peak half sine wave on-state current (a) initial t = 125c @ 60 hz 0.0083 s @ 50 hz 0.0100 s j at any rated load condition and with rated v applied following surge. rrm st223 c..c ser ies 2000 2500 3000 3500 4000 4500 5000 5500 6000 0.01 0.1 1 pulse train duration (s) m a x im um n on re p etitive s urg e curre nt v ersus p ulse tra in d ura tion . co ntro l of conduction may not be maintained. peak half sine w ave on -state c urrent (a) in it ia l t = 1 2 5 c no voltage reapplied rated v reapplied rrm j st223c ..c series 100 1000 10000 0246810 t = 25c j in st a n ta n eo u s o n -s ta t e c u rre nt ( a ) instantaneous on-state voltage (v) t = 125c j st223c..c serie s 0.00 1 0.01 0.1 1 0.00 1 0.01 0.1 1 10 s q ua re w a ve p ulse d uration (s) thj-hs tr a n sie n t th erm a l im p e d a n c e z (k/w ) st22 3c ..c serie s steady state value r = 0 .1 7 k/ w (sin gle side c oo le d) r = 0 .0 8 k/ w (double side cooled) (d c ope ratio n) thj-h s thj-hs 0 50 100 150 200 250 020406080100 i = 5 00 a 300 a 200 a 100 a 50 a rate of fall of on-state current - di/dt (a/s) maxim um reverse recovery charge - qrr (c) st223c..c series t = 125 c j tm 0 20 40 60 80 100 120 140 160 0 20406080100 m a xim um reve rse rec ove ry c urr ent - irr (a) ra te o f f a ll o f f orw a rd c urre nt - d i/d t (a /s) i = 50 0 a 300 a 200 a 100 a 50 a tm st2 23c ..c s e rie s t = 125 c j
vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 6 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 13 - frequency characteristics fig. 14 - frequency characteristics fig. 15 - frequency characteristics 1e2 1e3 1e4 1e1 1e2 1e3 1e4 50 hz 400 2500 100 pulse basewidth (s) pea k on-state current (a) 100 0 1500 3000 200 500 5000 st223c..c series sinusoidal pulse t = 40c c snubb er circuit r = 47 ohms c = 0.22 f v = 80% v s s d drm tp 10000 1e11e21e31e4 50 hz 400 2500 100 pulse basewidth (s) 1000 1500 3000 200 500 5000 st223c..c series sinusoidal pulse t = 55c c snubber circuit r = 47 ohms c = 0.22 f v = 80% v s s d drm tp 10 00 0 1e1 1e1 1e2 1e3 1e4 1e1 1e2 1e3 1e4 50 hz 400 2500 100 1000 150 0 3000 200 500 pulse b ase w idth (s) peak on-state current (a) st22 3c ..c se rie s trapezoidal pulse t = 40c di/dt = 50a/s c snu b b e r c irc uit r = 47 ohms c = 0.22 f v = 80% v s s d drm 5000 t p 100 00 1e1 1e2 1e3 1e4 50 hz 400 2500 100 pulse basewidth (s) 10 00 1500 200 500 st2 23 c..c series trapezoidal pulse t = 55c di/dt = 50a/s c snubber circuit r = 47 ohms c = 0.22 f v = 80% v s s d drm 3000 t p 5000 10000 1e1 1e2 1e3 1e4 1e1 1e2 1e 3 1e4 50 hz 400 250 0 10 0 1000 1500 3000 20 0 500 pulse b ase w id th (s) p ea k o n-sta te c urre nt (a ) snubb er circuit r = 47 ohms c = 0.22 f v = 80% v s s d drm st223c..c series tra pezoidal pulse t = 40c di/d t = 100a/s 5000 c t p 10000 1e1 1e2 1e3 1e4 50 hz 400 2500 100 pulse basewidth (s) 1000 1500 200 500 st223c..c series trap ezoid al p ulse t = 55c di/dt = 10 0a /s c snubber circuit r = 47 ohms c = 0.22 f v = 80% v s s d drm 3000 t p 5000 10000
vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 7 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 16 - maximum on-state ener gy power loss characteristics fig. 17 - gate characteristics 1e 1 1e 2 1e 3 1e 4 1e 5 1e1 1e2 1e3 1e4 pulse b a sew idth (s) 20 joules per pulse 2 1 0.5 0.3 0.2 0.1 10 peak on-state current (a) st223c..c series s inus o id a l p uls e 4 tp 1e1 1e2 1e3 1e4 pulse basewidth (s) 20 jo ule s p er pulse 2 1 0.5 0.3 0.2 0.1 st223c..c se ries recta ngular pulse di/d t = 50a/s 10 5 t p 0.1 1 10 100 0.001 0.0 1 0.1 1 1 0 100 vgd ig d (b) (a) tj=25 c tj=125 c tj=-40 c (1) (2) insta nta ne ous g ate c urrent (a ) instanta neo us g a te v olta g e (v ) rectangular gate pulse a ) r e c o m m e n d e d lo a d lin e fo r b ) re c o m m e n d e d lo a d lin e f o r <=30% rate d di/dt : 10v, 10ohm s rated di/dt : 20v , 10ohm s; tr<=1 s tr<=1 s (1) pgm = 1 0w , tp = 20 m s (2) pgm = 2 0w , tp = 10 m s (3) pgm = 4 0w , tp = 5m s (4) pgm = 6 0w, tp = 3.3m s (3 ) de vice : st223c ..c se rie s frequen cy lim ite d by pg (a v ) (4)
vs-st223c..c series www.vishay.com vishay semiconductors revision: 13-sep-17 8 document number: 93672 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 ordering information table links to related documents dimensions www.vishay.com/doc?95074 3 = fa s t-on term. (gate and aux. cathode s oldered lead s ) 2 - thyristor 3 -e ss ential part number 4 - 3 = fa s t turn off 5 - c = ceramic puk 6 - voltage code x 100 = v rrm ( s ee voltage rating s table) 11 7 - c = puk ca s e a-puk (to-200ab) 8 - reapplied dv/dt code (for t q te s t condition) 9 -t q code 10 - 0 = eyelet term. (gate and aux. cathode un s oldered lead s ) 1 = fa s t-on term. (gate and aux. cathode un s oldered lead s ) 2 = eyelet term. (gate and aux. cathode s oldered lead s ) - critical dv/dt: none = 500 v/ s ( s tandard value) l = 1000 v/ s ( s pecial s election) * standard part number. all other types available only on request. t q (s) dv/dt - t q combinations available dv/dt (v/s) 20 50 100 200 400 10 cn dn en fn* -- 12 cm dm em fm -- 15 cl dl el fl* hl 18 cp dp ep fp hp 20 ck dk ek fk hk 25 -- -- -- -- hj 30 -- -- -- -- hh device co d e 5 1 3 2 4 6 7 8 9 10 11 s t v s -22 3 c08c h k 1 - 1 -vi s hay s emiconductor s product
outline dimensions www.vishay.com vishay semiconductors revision: 12-jul-17 1 document number: 95074 for technical questions within your region: diodesamericas@vishay.com , diodesasia@vishay.com , diodeseurope@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 a-puk (to-200ab) dimensions in millimeters (inches) 4.75 (0.19) 28 (1.10) 6.5 (0.26) 19 (0.75) dia. max. 0.3 (0.01) min. 0.3 (0.01) min. 13.7/14.4 (0.54/0.57) 25 5 gate terminal for 1.47 (0.06) dia. pin receptacle 19 (0.75) dia. max. 38 (1.50) dia max. 2 holes 3.56 (0.14) x 1.83 (0.07) minimum deep 42 (1.65) max. anode to gate creepage distance: 7.62 (0.30) minimum strike distance: 7.12 (0.28) minimum quote between upper and lower pole pieces has to be considered after application of mounting force (see thermal and mechanical specification) c a g note: a = anode c = cathode g = g ate
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